CWE-1256: Improper Restriction of Software Interfaces to Hardware Features
The product provides software-controllable device functionality for capabilities such as power and clock management, but it does not properly limit functionality that can lead to modification of hardware memory or register bits, or the ability to observe physical side channels.
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Overview
It is frequently assumed that physical attacks such as fault injection and side-channel analysis require an attacker to have physical access to the target device. This assumption may be false if the device has improperly secured power management features, or similar features. For mobile devices, minimizing power consumption is critical, but these devices run a wide variety of applications with different performance requirements. Software-controllable mechanisms to dynamically scale device voltage and frequency and monitor power consumption are common features in today's chipsets, but they also enable attackers to mount fault injection and side-channel attacks without having physical access to the device. Fault injection attacks involve strategic manipulation of bits in a device to achieve a desired effect such as skipping an authentication step, elevating privileges, or altering the output of a cryptographic operation. Manipulation of the device clock and voltage supply is a well-known technique to inject faults and is cheap to implement with physical device access. Poorly protected power management features allow these attacks to be performed from software. Other features, such as the ability to write repeatedly to DRAM at a rapid rate from unprivileged software, can result in bit flips in other memory locations (Rowhammer, [REF-1083]). Side channel analysis requires gathering measurement traces of physical quantities such as power consumption. Modern processors often include power metering capabilities in the hardware itself (e.g., Intel RAPL) which if not adequately protected enable attackers to gather measurements necessary for performing side-channel attacks from software.
Real-world CVEs
2 recorded CVEs are caused by CWE-1256 (Improper Restriction of Software Interfaces to Hardware Features). The highest-severity and most recent are shown first. 0 new CWE-1256 CVEs have been recorded so far in 2026 (2 in 2025).
Common consequences
What can happen when CWE-1256 is exploited.
Modify Memory, Modify Application Data, Bypass Protection Mechanism
Affects: Integrity
How it happens
When it is introduced
Typically introduced during these phases of the software lifecycle.
Applies to
Technologies
How to prevent it
Practical mitigations for CWE-1256, grouped by where in the lifecycle they apply.
Ensure proper access control mechanisms protect software-controllable features altering physical operating conditions such as clock frequency and voltage.
How to detect it
Manual Analysis
Perform a security evaluation of system-level architecture and design with software-aided physical attacks in scope.
Automated Dynamic Analysis
Use custom software to change registers that control clock settings or power settings to try to bypass security locks, or repeatedly write DRAM to try to change adjacent locations. This can be effective in extracting or changing data. The drawback is that it cannot be run before manufacturing, and it may require specialized software.
Effectiveness: Moderate
Code examples
Illustrative examples from MITRE showing how the weakness appears in code.
This example considers the Rowhammer problem [REF-1083]. The Rowhammer issue was caused by a program in a tight loop writing repeatedly to a location to which the program was allowed to write but causing an adjacent memory location value to change.
Suppose a hardware design implements a set of software-accessible registers for scaling clock frequency and voltage but does not control access to these registers. Attackers may cause register and memory changes and race conditions by changing the clock or voltage of the device under their control.
Consider the following SoC design. Security-critical settings for scaling clock frequency and voltage are available in a range of registers bounded by [PRIV_END_ADDR : PRIV_START_ADDR] in the tmcu.csr module in the HW Root of Trust. These values are writable based on the lock_bit register in the same module. The lock_bit is only writable by privileged software running on the tmcu.
We assume that untrusted software running on any of the Core{0-N} processors has access to the input and output ports of the hrot_iface. If untrusted software can clear the lock_bit or write the clock frequency and voltage registers due to inadequate protection, a fault injection attack could be performed.
Illustrative examples
Real CVEs that MITRE cites as examples of this weakness.
- CVE-2019-11157 — Plundervolt: Improper conditions check in voltage settings for some Intel(R) Processors may allow a privileged user to potentially enable escalation of privilege and/or information disclosure via local access [REF-1081].
- CVE-2020-8694 — PLATYPUS Attack: Insufficient access control in the Linux kernel driver for some Intel processors allows information disclosure.
- CVE-2020-8695 — Observable discrepancy in the RAPL interface for some Intel processors allows information disclosure.
- CVE-2020-12912 — AMD extension to a Linux service does not require privileged access to the RAPL interface, allowing side-channel attacks.
- CVE-2015-0565 — NaCl in 2015 allowed the CLFLUSH instruction, making Rowhammer attacks possible.
Attack patterns
CAPEC attack patterns that exploit this weakness.
Frequently asked questions
Common questions about CWE-1256.
- What is CWE-1256?
- The product provides software-controllable device functionality for capabilities such as power and clock management, but it does not properly limit functionality that can lead to modification of hardware memory or register bits, or the ability to observe physical side channels.
- What CVEs are caused by CWE-1256?
- 2 recorded CVEs are attributed to CWE-1256, including CVE-2024-5477, CVE-2024-48869.
- How do you prevent CWE-1256?
- Ensure proper access control mechanisms protect software-controllable features altering physical operating conditions such as clock frequency and voltage.
- How is CWE-1256 detected?
- Manual Analysis: Perform a security evaluation of system-level architecture and design with software-aided physical attacks in scope.
- What are the consequences of CWE-1256?
- Exploiting CWE-1256 can lead to: Modify Memory, Modify Application Data, Bypass Protection Mechanism.
- Is CWE-1256 actively exploited?
- 2 recorded CVEs are caused by CWE-1256; none are currently in CISA's KEV catalog of actively exploited flaws.
References
- MITRE CWE definition (CWE-1256) (opens in a new tab)
- CWE-1256 vulnerabilities on NVD (opens in a new tab)
- Learn: What is a CWE?
Weakness data is sourced from the MITRE CWE catalog (v4.20). CVE associations are aggregated and kept current by RadicalNotion.AI.
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